1. Field of the Invention
The present invention relates to a semiconductor device that is used in, for example, a power conversion device which includes a power device and converts DC power into AC power.
2. Related Art
A power conversion device has been widely used in a power conditioner (power conditioning subsystem: PCS) with a function of converting power generated by a power generation unit, such as a solar cell, a fuel cell, or a gas engine, into system power or an uninterrupted power supply (UPS).
A semiconductor module obtained by mounting a power device, such as an insulated gate bipolar transistor (IGBT) or a free wheeling diode (FWD), on an insulating substrate and storing the insulating substrate in a resin case has been used in the power conversion device.
For example, Japanese Patent Application Publication No. JP 2012-110095 A (also referred to herein as “Patent Document 1”) discloses a power semiconductor module as an example of the semiconductor module used in this type of power conversion device.
In the power semiconductor module, a circuit corresponding to one phase of a three-level inverter circuit is stored in the case. In the three-level inverter circuit, wiring is performed such that one of a U terminal and an M terminal to which a current flows in the opposite direction is arranged close to the other terminal, thereby reducing inductance in the case.
Japanese Patent Application Publication No. JP 2011-254672 A (also referred to herein as “Patent Document 2”) discloses a power semiconductor module as another example of the module according to the related art. In the power semiconductor module, when a three-level inverter has the same structure as the three-level inverter disclosed in Patent Document 1, among external terminals P, M, N, and U, the terminal M is divided into terminals M1 and M2 and the terminals are linearly arranged in order of the terminals M1, P, N, M2, and U or in order of the terminals M1, N, P, M2, and U. According to this structure, it is possible to prevent an increase in bouncing voltage due to the influence of wiring inductance when the operation mode of the inverter is changed from a three-level mode to a two-level mode.
Japanese Patent Application Publication No. JP 2008-193779 A (also referred to herein as “Patent Document 3”) discloses a semiconductor module as still another example of the module according to the related art. In the semiconductor module, a series connection circuit of IGBTs which are connected between a P terminal and an N terminal of a DC power supply and an AC switching element which is connected between a connection point of the series connection circuit and a neutral point of the DC power supply are put into one package. Therefore, it is possible to reduce wiring inductance and to reduce the costs of the device. As a technique for forming the three-level inverter, the following techniques have been disclosed: a technique in which IGBTs that are connected in inverse parallel to two diodes are connected in series to each other to form a bidirectional switch; and a technique in which two reverse blocking IGBTs are connected in inverse parallel to each other to form a bidirectional switch. The reverse blocking IGBT is an IGBT with reverse breakdown voltage characteristics.
Japanese Patent Application Publication No. JP 2011-193646 A (also referred to herein as “Patent Document 4”) discloses a semiconductor device as yet another example of the module according to the related art. The semiconductor device includes a series connection circuit of IGBTs which are connected between a P terminal and an N terminal of a DC power supply of a three-level inverter circuit and an intermediate terminal that is provided at a connection point between first and second IGBTs to which diodes are connected in inverse parallel and which are connected in series to each other between a connection point of the series connection circuit and a neutral point of the DC power supply. According to this structure, it is possible to perform an insulation test for a semiconductor device while preventing the IGBTs or the diodes from being broken.
Japanese Patent Application Publication No. JP 2002-368192 A (also referred to herein as “Patent Document 5”) discloses a semiconductor device as still yet another example of the module according to the related art. The semiconductor device is a high-capacity semiconductor device that is used in a device, for example, an inverter. In the semiconductor device, three IGBT chips are provided on an insulating substrate and are arranged in a zigzag pattern so as to be connected in parallel.
However, in the above-mentioned Patent Document 1, wiring is performed such that the U terminal and the M terminal overlap each other. Therefore, it is possible to reduce inductance in the case. In the above-mentioned Patent Document 2, the terminal P is close to the terminal N, the terminal P is adjacent to the terminal M1, and the terminal N is adjacent to the terminal M2. However, there is an unsolved problem that the overlap width between the terminals is narrow and it is difficult to sufficiently reduce inductance.
The above-mentioned Patent Document 3 discloses a structure in which it is easy to arrange a P-C1 line and an M line so as to be close to each other and to arrange the M line and an N-E2 line so as to be close to each other. However, the width of a portion of the M line which faces the P-C1 line and the N-E2 line is small and it is difficult to sufficiently reduce inductance.
The above-mentioned Patent Documents 4 and 5 do not disclose a technique for reducing inductance, but disclose only the structure of the three-level inverter circuit.